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型式74xx373ICのVerilog-HDLモデルです。


//
// Title        : (373) OCTAL D-TYPE TRANSPARENT LATCHES WITH 3-STATE OUTPUTS
// File name    : 373.v
// Date         : 2000/12/08  Ver1.0
// Company      : Future Technology Ltd.
//

//-----------------------------------------------------
//  Module
//-----------------------------------------------------

module U373 (
            XOC,
            C,
            D,
            Q
        );


    input           XOC;
    input           C;
    input   [7:0]   D;
    output  [7:0]   Q;

//-----------------------------------------------------
//  Using register
//-----------------------------------------------------
    reg     [7:0]   sr_q;


    assign  Q = (XOC==1'b1)?Z:sr_q;

    always@(C or D)begin
        if(C)begin
            sr_q <= D;
        end
    end

endmodule



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