-- 
-- Title        ： (4040) 12-STAGE BINARY COUNTERS
-- File name    ： 4040.vhd
-- Date         ： 2000-12-08 Ver1.0 
-- Company      ： Future Technology Ltd. 
-- 

-- use library --
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use IEEE.std_logic_arith.all;

-- entity list --
entity U4040 is
    port (
        CLK :   in  std_logic;
        CLR :   in  std_logic;
        QA  :   out std_logic;
        QB  :   out std_logic;
        QC  :   out std_logic;
        QD  :   out std_logic;
        QE  :   out std_logic;
        QF  :   out std_logic;
        QG  :   out std_logic;
        QH  :   out std_logic;
        QI  :   out std_logic;
        QJ  :   out std_logic;
        QK  :   out std_logic;
        QL  :   out std_logic
      );
end U4040;

-- architecture --
architecture U4040 of U4040 is

-- signal list --
signal sr_qa    : std_logic;
signal sr_qb    : std_logic;
signal sr_qc    : std_logic;
signal sr_qd    : std_logic;
signal sr_qe    : std_logic;
signal sr_qf    : std_logic;
signal sr_qg    : std_logic;
signal sr_qh    : std_logic;
signal sr_qi    : std_logic;
signal sr_qj    : std_logic;
signal sr_qk    : std_logic;
signal sr_ql    : std_logic;


begin

    process(CLK , CLR)begin
        if(CLR='1')then
            sr_qa <= '0';
        elsif(CLK'event and CLK='0')then
            sr_qa <= not sr_qa;
        end if;
    end process;

    process(sr_qa,CLR)begin
        if(CLR='1')then
            sr_qb <= '0';
        elsif(sr_qa'event and sr_qa='0')then
            sr_qb <= not sr_qb;
        end if;
    end process;

    process(sr_qb,CLR)begin
        if(CLR='1')then
            sr_qc <= '0';
        elsif(sr_qb'event and sr_qb='0')then
            sr_qc <= not sr_qc;
        end if;
    end process;

    process(sr_qc,CLR)begin
        if(CLR='1')then
            sr_qd <= '0';
        elsif(sr_qc'event and sr_qc='0')then
            sr_qd <= not sr_qd;
        end if;
    end process;

    process(sr_qd,CLR)begin
        if(CLR='1')then
            sr_qe <= '0';
        elsif(sr_qd'event and sr_qd='0')then
            sr_qe <= not sr_qe;
        end if;
    end process;

    process(sr_qe,CLR)begin
        if(CLR='1')then
            sr_qf <= '0';
        elsif(sr_qe'event and sr_qe='0')then
            sr_qf <= not sr_qf;
        end if;
    end process;

    process(sr_qf,CLR)begin
        if(CLR='1')then
            sr_qg <= '0';
        elsif(sr_qf'event and sr_qf='0')then
            sr_qg <= not sr_qg;
        end if;
    end process;

    process(sr_qg,CLR)begin
        if(CLR='1')then
            sr_qh <= '0';
        elsif(sr_qg'event and sr_qg='0')then
            sr_qh <= not sr_qh;
        end if;
    end process;

    process(sr_qh,CLR)begin
        if(CLR='1')then
            sr_qi <= '0';
        elsif(sr_qh'event and sr_qh='0')then
            sr_qi <= not sr_qi;
        end if;
    end process;

    process(sr_qi,CLR)begin
        if(CLR='1')then
            sr_qj <= '0';
        elsif(sr_qi'event and sr_qi='0')then
            sr_qj <= not sr_qj;
        end if;
    end process;

    process(sr_qj,CLR)begin
        if(CLR='1')then
            sr_qk <= '0';
        elsif(sr_qj'event and sr_qj='0')then
            sr_qk <= not sr_qk;
        end if;
    end process;

    process(sr_qk,CLR)begin
        if(CLR='1')then
            sr_ql <= '0';
        elsif(sr_qk'event and sr_qk='0')then
            sr_ql <= not sr_ql;
        end if;
    end process;

    QA  <=  sr_qa;
    QB  <=  sr_qb;
    QC  <=  sr_qc;
    QD  <=  sr_qd;
    QE  <=  sr_qe;
    QF  <=  sr_qf;
    QG  <=  sr_qg;
    QH  <=  sr_qh;
    QI  <=  sr_qi;
    QJ  <=  sr_qj;
    QK  <=  sr_qk;
    QL  <=  sr_ql;

end U4040;