--
-- Title        : (157) 2 to 1 Data Selectors
-- File name    : 157.vhd
-- Date         : 2000-12-08  Ver1.0
-- Company      : Future Technology Ltd.
--

-- use library --
library IEEE;
use IEEE.std_logic_1164.all;
use IEEE.std_logic_unsigned.all;
use IEEE.std_logic_arith.all;

-- entity list --
entity U157 is
    port (
        A   :   in  std_logic_vector(3 downto 0);
        B   :   in  std_logic_vector(3 downto 0);
        SEL :   in  std_logic;
        G   :   in  std_logic;
        Y   :   out std_logic_vector(3 downto 0)
      );
end U157;

-- architecture --
architecture U157 of U157 is


begin

    Y <= "0000" when (G='1') else A when (SEL='0') else B;

end U157;